top of page
校徽.png

​機電工程學系

半導體製程優化設計與模擬實驗室

 

Design and Simulation of  Semiconductor Process Laboratory

​中文書籍

  • 劉傳璽、陳進來，半導體元件物理與製程–理論與實務 (539頁)，五南圖書，2022年1月，四版一刷。

  • 劉傳璽、陳進來，半導體元件物理與製程–理論與實務 (488頁)，五南圖書，2011年9月，三版一刷。

  • 劉傳璽、陳進來，半導體元件物理與製程–理論與實務，五南圖書，2006年11月，二版一刷。

  • 劉傳璽、陳進來，半導體元件物理與製程–理論與實務，五南圖書，2006年1月，初版一刷。

  • 劉傳璽、林洲富、陳建宇，半導體產業營業秘密與智慧財產權之理論與實務 (296頁)，五南圖書，2021年12月，初版二刷。

  • 劉傳璽、林洲富、陳建宇，半導體產業營業秘密與智慧財產權之理論與實務，五南圖書，2021年2月，初版一刷。

  • 鄭晃忠、劉傳璽(主編)，新世代積體電路製程技術 (472頁)，東華書局，2011年9月。

  • ​王木俊、劉傳璽，薄膜電晶體液晶顯示器：原理與實務 (358頁)，新文京，2008年9月。

​期刊論文

  • Shui-Yang Lien, Po-Chen Lin, Wen-Ray Chen, Chuan-Hsi Liu, Po-Wen Sze, Na-Fu Wang, Chien-Jung Huang, “Improving Optoelectrical Properties of PEDOT: PSS by Organic Additive and Acid Treatment”, Crystals, 12 (2022) 537.

  • Shui-Yang Lien, Pin-Jia Lai, Wen-Ray Chen, Chuan-Hsi Liu, Po-Wen Sze, Chien-Jung Huang, “The Annealing Effect at Different Temperatures for Organic-Inorganic Perovskite Quantum Dots”, Crystals, 12 (2022) 204.

  • Kuan-Wei Lee, Chuan-Hsi Liu, Durga Misra, “Editorial: Wide Bandgap Materials for Semiconductor Devices”, Microelectronics Reliability, 91 (2018) 306.

  • Chuan-Hsi Liu, Chun-Hu Cheng, Chin-Pao Cheng, Juin J. Liou, “Editorial: IEDMS 2016”, Microelectronics Reliability, 83 (2018) 207.

  • Chang-Chun Lee, Chuan-Hsi Liu, Dian-Yong Li, Chia-Ping Hsieh, “Effect of contact-etch-stop-layer and Si1-xGex channel mechanical properties on nano-scaled short channel NMOSFETs with dummy gate arrays”, Microelectronics Reliability, 83 (2018) 230.

  • Chang-Chun Lee, Yen-Ting Kuo, Chuan-Hsi Liu, “Interaction influence of S/D GeSi lattice mismatch and stress gradient of CESL on nano-scaled strained nMOSFETs”, Materials Science in Semiconductor Processing, 70 (2017) 254.

  • Shea-Jue Wang, Mu-ChunWang, Shuang-Yuan Chen, Wen-How Lan, Bor-Wen Yang, L.S. Huang, Chuan-Hsi Liu, “Heat stress exposing performance of deep-nano HK/MG nMOSFETs using DPN or PDA treatment”, Microelectronics Reliability, 55 (2015) 2203.

  • K.C. Lin, P.C. Juan, C.H. Liu, M.C.Wang, C.H. Chou, “Leakage current mechanism and effect of Y2O3 doped with Zr high-K gate dielectrics”, Microelectronics Reliability, 55 (2015) 2198.

  • Chang-Chun Lee, Chuan-Hsi Liu, Hsien-Chie Cheng, Rong Hao Deng, “Structural Optimizations of Silicon Based NMOSFETs with a Sunken STI Pattern by Using a Robust Stress Simulation Methodology”, Journal of Nanoscience and Nanotechnology, 15 (2015) 2179.

  • Piyas Samanta, Heng-Sheng Huang, Shuang-Yuan Chen, Chuan-Hsi Liu, Li-Wei Cheng, “Positive bias temperature instability in p-type metal-oxide-semiconductor devices with HfSiON/SiO2 gate dielectrics”, Journal of Applied Physics, 115 (2014) 074502.

  • Mu-Chun Wang, Heng-Sheng Huang, Min-Ru Peng, Shea-Jue Wang, Tsao-Yeh Chen, Wen-Shiang Liao, Hsin-Chia Yang, Chuan-Hsi Liu, “Punch-through and junction breakdown characteristics for uniaxial strained nano-node metal-oxide-semiconductor field-effect transistors on (100) wafers”, International Journal of Materials and Product Technology, 49 (2014) 25.

  • H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. R. Peng, M. C. Wang, C. H. Liu, “Comparison of NMOSFET and PMOSFET Devices That Combine CESL Stressor and SiGe Channel”, Journal of Nanoscience and Nanotechnology, 13 (2013) 8127.

  • H.W. Hsu, K.C. Lin, C.C. Lee, M.J. Twu, H.S. Huang, S.Y. Chen, M.R. Peng, H.H. Teng, C.H. Liu, “Phenomena of n-type metal-oxide-semiconductor-field-effect-transistors with contact etch stop layer stressor for different channel lengths”, Thin Solid Films, 544 (2013) 120.

  • P.C. Juan, C.H. Liu, C.L. Lin, F.C. Mong, J.H. Huang, “The effect of ZrN antidiffusion capping layer on the electrical and physical properties of metal-gate/ZrN/Zr-graded Dy2O3/Si MIS nanolaminated structures”, Microelectronic Engineering, 109 (2013) 172.

  • Pi-chun Juan, Cheng-li Lin, Chuan-hsi Liu, Chun-heng Chen, Yin-ku Chang, Ling-yen Yeh, “Temperature-dependent current conduction of metal-ferroelectric (BiFeO3)-insulator (ZrO2)-Silicon capacitors for nonvolatile memory applications”, Thin Solid Films, 539 (2013) 360.

  • H.W. Hsu, H.S. Huang, H.W. Chen, C.P. Cheng, K.C. Lin, S.Y. Chen, M.C. Wang, C.H. Liu, “Time dependent dielectric breakdown (TDDB) characteristics of metal–oxide–semiconductor capacitors with HfLaO and HfZrLaO ultra-thin gate dielectrics”, Solid-State Electronics, 77 (2012) 2.

  • Chuan-Hsi Liu, Hung-Wen Hsu, Hung-Wen Chen, Pi-Chun Juan, Mu-Chun Wang, Chin-Po Cheng, Heng-Sheng Huang, “Reliability characteristics of metal-oxide-semiconductor capacitors with 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics”, Microelectronic Engineering, 89 (2012) 15.

  • Chuan-Hsi Liu, Pi-Chun Juan, Yi-Hsien Chou, Hung-Wen Hsu, “The effect of lanthanum (La) incorporation in ultra-thin ZrO2 high-j gate dielectrics”, Microelectronic Engineering, 89 (2012) 2.

  • Heng-Sheng Huang, Piyas Samanta, Tsung-Jian Tzeng, Shuang-Yuan Chen, Chuan-Hsi Liu, “Electron detrapping in thin hafnium silicate and nitrided hafnium silicate gate dielectric stacks”, Applied Physics Letters, 100 (2012) 023501.

  • C.H. Liu, P.C. Juan, J.Y. Lin, “The influence of lanthanum doping position in ultra-thin HfO2 films for high-k gate dielectrics”, Thin Solid Films, 518 (2010) 7455.

  • Heng-Sheng Huang, Mu-Chun Wang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Ai-Erh Chuang, Chuan-Hsi Liu, “Substrate current verifying lateral electrical field under forward substrate biases for nMOSFETs”, Solid-State Electronics, 54 (2010) 527.

  • Mu-Chun Wang, Chuan-Hsi Liu, Kuo-Shu Huang, Zhen-Ying Hsieh, Shuang-Yuan Chen, Hsin-Chia Yang, Chii-Ruey Lin, “Promoting of charged-device model/electrostatic discharge immunity in the dicing saw process”, Microelectronics Reliability, 50 (2010) 839.

  • H.W. Chen, C.H. Liu, “Impact of Hf content on positive bias temperature instability reliability of HfSiON gate dielectrics”, Microelectronics Reliability, 50 (2010) 614.

  • C.H. Liu, H.W. Chen, “Electrical characteristics and reliability properties of metal–oxide–semiconductor capacitors with HfZrLaO gate dielectrics”, Microelectronics Reliability, 50 (2010) 599.

  • Chuan-Hsi Liu, Hung-Wen Chen, Shung-Yuan Chen, Heng-Sheng Huang, Li-Wei Cheng, “Current conduction of 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics”, Applied Physics Letters, 95 (2009) 012103.

  • H.W. Chen, F.C. Chiu, C.H. Liu, S.Y. Chen, H.S. Huang, P.C. Juan, H.L. Hwang, “Interface characterization and current conduction in HfO2-gated MOS capacitors”, Applied Surface Science, 254 (2008) 6112.

  • C.H. Liu, F.C. Chiu, “Electrical Characterization of ZrO2/Si Interface Properties in MOSFETs With ZrO2 Gate Dielectrics”, IEEE Electron Device Letters, 26 (2007) 62.

  • Chuan-Hsi Liu, Tung-Ming Pan, Wei-Hao Shu, Kuo-Chan Huang, “Physical and Electrical Properties of Ti-Doped Er2O3 Films for High-k Gate Dielectrics”, Electrochemical and Solid-State Letters, 10 (2007) G54.

  • Chuan-Hsi Liu, Tung-Ming Pan, “Hot Carrier and Negative-Bias Temperature Instability Reliabilities of Strained-Si MOSFETs”, IEEE Transactions on Electron Devices, 54 (2007) 1799.

  • Tung-Ming Pan, Chuan-Hsi Liu, “Reliability Scaling Limit of 14-Å Oxynitride Gate Dielectrics by Different Processing Treatments”, Journal of The Electrochemical Society, 152 (2005) G851.

bottom of page